Escalator Interconnects: Enabling Multi-Layer Integrated Photonic Systems

Introduction

As the demand for processing vast amounts of data continues to grow, integrated photonics has emerged as a promising solution. Programmable photonic networks are gaining popularity due to their ability to handle complex computational needs. However, these networks face limitations in terms of available on-chip real estate in single- and dual-layer designs, as well as compatibility issues with mature active silicon photonics such as modulators.

To overcome these challenges, researchers have demonstrated the fabrication of four-layer escalator interconnects using sputtered metal oxide alloys. These interconnects enable multi-layer routing of optical power, paving the way for more complex and efficient photonic systems.

Escalator Interconnects: Design and Fabrication

Escalator interconnects are designed to achieve adiabatic coupling centered around a wavelength of 1550 nm, using FDTD and MODE simulations in Lumerical. The interconnect design features waveguides in separate layers that taper to a narrower width for evanescent coupling from one layer to another.

Sputtered metal oxide alloy waveguide layers are fabricated using standard nanofabrication processing, ensuring that the process does not inherently degrade the quality of each layer as the number of layers increases. All processing temperatures are maintained below 150°C to ensure BEOL-compatibility.

Fig. 1. Artist rendering of the escalator interconnection of 4 layers. Inset shows a cross-section of 4 waveguide layers on a multi-layer device.

Experimental Results

Microscope images of two-layer and four-layer escalator waveguides are shown in Figure 2. The thin-film interference from the stage light source reveals each layer in different colors. Two-layer escalator waveguides vertically couple light from layers 1 to 2 to 1 (1-2-1), 2-3-2, and 3-4-3, while four-layer escalator waveguides couple light from layers 1-2-3-4.

Fig. 2. Microscope images show two- and four-layer escalator waveguides with thin-film interference coloring each layer differently. The two-layer waveguides vertically couple light between layers in patterns 1-2-1, 2-3-2, and 3-4-3. The four-layer waveguides couple light in a 1-2-3-4 sequence from left to right.

Coupling loss between layers is measured using amplified spontaneous emission (ASE), and wavelength-dependent insertion loss per coupling interaction is determined for the TE-like mode for each pair of layers. An example of this is shown in Figure 3a.

Fig. 3. (a) Graph of interlayer coupling loss versus number of transitions for various layers, with error bars indicating standard deviation from 1535nm to 1565nm wavelengths; a solid black line represents the best fit for all layers. A red asterisk marks data for a four-layer escalator interconnect. (b) Interlayer coupling loss plotted against wavelength for different escalator taper geometries.

The interlayer coupling loss dependence on the interlayer coupler geometry is measured as a function of wavelength for different layers, as seen in Figure 3b.

The two-layer escalator interconnects test the coupling between layers 1 to 2 to 1 (1-2-1), 2-3-2, and 3-4-3, while the four-layer escalator interconnects test the coupling from 1-2-3-4 by coupling three times, once in each consecutive layer.

Despite a fabrication error causing higher loss in the second layer, resulting in lower output transmission for the four-layer compared to the two-layer, the escalator interconnect successfully communicates across the four-layer stack.

Advantages and Applications

By doubling the number of layers previously available to on-chip optical networks and demonstrating a scalable technique with no known limitation on the maximum number of layers, more complex systems can be realized. These systems can leverage the versatility and active modulation achievable with silicon photonics combined with the low-loss and high nonlinearity of sputtered metal oxide alloys.

Escalator interconnects allow for optical systems to have dedicated routing layers and dedicated device layers, making system-on-a-chip integration more attainable. This advancement paves the way for programmable photonic circuits and multipurpose self-configuration of programmable photonic circuits.

Conclusion

The demonstration of four-layer escalator interconnects using sputtered metal oxide alloys marks a significant milestone in the development of massively multi-layer integrated photonic systems. By enabling multi-layer routing of optical power, these interconnects open up new possibilities for more complex and efficient photonic networks.

With the ability to stack and independently pattern four photonic waveguide layers on a single chip, and the potential for further scaling, escalator interconnects offer a scalable solution for overcoming the limitations of single- and dual-layer designs. This technology has the potential to revolutionize the field of integrated photonics, enabling new applications in areas such as data processing, communications, and beyond.

References

[1] T. Schreyer et al., "Escalator Interconnects for Massively Multi-Layer Integrated Photonic Systems," Electrical and Computer Engineering, Johns Hopkins University, Baltimore, MD, USA; University of Pennsylvania, Philadelphia, PA, USA; VIAVI Solutions Inc., Santa Rosa, CA, USA, 2024, pp. 1-6, doi: 979-8-3503-9404-7/24/$31.00 ©2024 IEEE. [5] N. MacFarlane, M. R. Kossey, J. R. Stroud, M. A. Foster, and A. C. Foster, "A multi-layer platform for low-loss nonlinear silicon photonics," APL Photonics, vol. 4, no. 11, Nov. 2019. [Online]. Available: https://doi.org/10.1063/1.5115234