OFC2025|Integration of TSMC’s Low-Loss and High-Uniformity Silicon Nitride Photonic Devices on Silicon Photonics Platform

Introduction

In recent years, silicon photonics has seen significant advancements, particularly in the data center sector, where high bandwidth, energy efficiency, and scalability are crucial. With ever-growing data demands, photonic integrated chips (PICs) must support multiple wavelength channels and handle optical powers of up to approximately 21 dBm to enable wavelength-division multiplexing (WDM) and pulse amplitude modulation (PAM4) technologies. Traditional silicon-based passive components face high optical loss challenges under strong optical intensity, primarily due to two-photon absorption and free-carrier absorption effects. Furthermore, the central wavelength of silicon-based multiplexer/demultiplexer devices is highly sensitive to temperature changes, due to silicon’s high thermo-optic coefficient of approximately 1.8×10^-4/K.

Silicon nitride (SiN) has emerged as a promising complementary material to address these limitations. With a significantly lower thermo-optic coefficient (~2.5×10^-5/K), SiN is better suited for high optical power applications and provides enhanced thermal stability. However, despite these advantages, fabricating high-performance and uniform SiN photonic devices using 300 mm foundry processes remains a challenge [1].

Platform Architecture and Integration Approach

Taiwan semiconductor manufacturing company (TSMC) has developed an integrated photonics platform that combines SiN components with existing silicon photonics technologies. This platform employs plasma-enhanced chemical vapor deposition (PECVD) to integrate SiN thin films onto a silicon photonics foundation that already includes high-speed microring modulators (MRM) and Mach–Zehnder modulators (MZM).

Figure 1. Cross-sectional schematic of photonic integrated chip platforms showing silicon-and SiN-based photonic devices, including two types of optical I/Os: silicon grating couplers and SiN edge couplers.

The platform leverages mature CMOS technology and advanced lithography and etching processes to define critical PIC structures on 300mm silicon-on-insulator (SOI) wafers. As shown in Figure 1, the cross-sectional schematic highlights the co-existence of both silicon- and SiN-based photonic devices on the same substrate. This architecture offers great flexibility in fiber array alignment, adapting to a variety of application requirements.

Using an SOI substrate with a top silicon thickness of 270 nm, the platform supports multiple silicon trench depths to realize low-loss silicon grating couplers. The SiN film is deposited during the middle-of-line (MEOL) phase to minimize thermal budget impacts on high-speed photodetectors and modulators, which require careful thermal management during fabrication to preserve performance characteristics.

Performance of SiN Photonic Devices

PECVD SiN typically suffers from high propagation loss and poor thickness uniformity in waveguides. However, through process optimization, TSMC has achieved significant improvements in these metrics.

Figure 2. Propagation loss measurements of single-mode (SM) and multi-mode (MM) SiN waveguides fabricated by three processes, along with top-view schematics and insertion loss measurements of various SiN devices.

As shown in Figure 2(a), the propagation loss of straight SiN waveguides has been greatly reduced. At a wavelength of 1311 nm, the single-mode waveguide (800 nm wide) and multi-mode waveguide (1.5 μm wide) exhibit losses of only 0.16 dB/cm and 0.124 dB/cm, respectively—down from approximately 0.4 dB/cm. The SiN waveguides also maintain flat, low-loss characteristics across the coarse WDM (CWDM) band (1271 nm to 1331 nm), making them suitable for applications requiring wide wavelength coverage.

For compact SiN waveguide bends, the researchers adopted adiabatic designs with inner and outer bend radii, achieving low loss and compact routing. Figure 2(b) shows the performance of the adiabatic design with a 30 μm radius. At 1311 nm, the median insertion loss is extremely low (~0.004 dB) with a 3-sigma variation of only ~0.001 dB, demonstrating excellent uniformity and performance.

Other SiN photonic building blocks also show impressive performance. Figures 2(c), 2(d), and 2(e) respectively display insertion loss measurements for taper structures, crossings, and 1×2 multimode interference (MMI) power splitters. These results collectively validate the high performance and uniformity of SiN films manufactured using advanced CMOS-compatible technologies.

Enhanced Transition from SiN to Silicon

A key challenge in integrating SiN with silicon photonics lies in efficient mode conversion between different material layers. Due to the top silicon layer's thickness (270 nm), phase-matched conversion of TM modes between SiN and silicon is not feasible. To overcome this, the research team optimized an inverse taper design using a thinner top silicon layer.

Figure 3. Top view and cross-sectional schematic of SiN-to-silicon waveguide transition and insertion loss measurement data.

By introducing optical proximity correction (OPC) and additional etching processes, silicon taper structures with thinner thickness and narrow tips (width < 90 nm) were formed. As shown in Figure 3(a), the optimized device includes two taper transitions: SiN to thin silicon and thin silicon to 270 nm silicon. This approach ensures efficient mode conversion while minimizing loss.

Figure 3(b) shows the total insertion loss of the SiN-to-silicon transition. At 1311 nm, the TE and TM modes exhibit extremely low insertion losses of approximately 0.03 dB and 0.06 dB, respectively. Across the CWDM wavelength range (1271–1331 nm), the polarization-dependent loss (PDL) remains below 0.038 dB, indicating excellent polarization handling capabilities.

Optimization of SiN Edge Couplers

Efficient coupling between PICs and optical fibers is critical for overall system performance. The researchers optimized the tip width of linear inverse taper structures to achieve low-loss and low-PDL coupling to lens fibers with a 5 μm mode field diameter, without the use of index-matching materials.

Figure 4. Transmission spectra of SiN edge couplers for TE and TM polarizations and loss measurements for each surface of the edge coupler under both polarization states.

In the edge coupler design, the backend-of-line (BEOL) dielectric film atop the SiN edge coupler is replaced with an oxide film to better match the mode with the fiber array unit. To prevent substrate leakage in the PIC, self-aligned isotropic etching is used to form silicon substrate recesses after surface etching.

Figure 4(a) presents measurements of SiN edge couplers in a loopback configuration. The TE and TM modes show flat spectra with insertion losses under 1 dB across the entire O-band (1260–1360 nm) and PDL below 0.2 dB, highlighting excellent polarization management. Figures 4(b) and 4(c) show the loss measurements per surface for TE and TM polarized light. With strict control over critical dimension uniformity, a low insertion loss standard deviation of only 0.1 dB is achieved over the 1260–1350 nm wavelength range.

Conclusion

The integration of SiN photonic devices into an advanced silicon photonics platform represents a leap forward for photonic integrated chip technologies. Through the co-optimization of careful design and advanced processing capabilities, TSMC has demonstrated SiN building blocks with low optical loss and tight statistical variation.

These developments enable leveraging the advantages of SiN—lower thermo-optic coefficient and better high-power handling—without compromising the high performance of existing silicon photonic components. The platform supports future bandwidth demands in data center applications, accommodating multiple wavelength channels and high optical power levels required for advanced modulation formats and WDM.

This Si-SiN combined platform, with its diverse building blocks—including straight waveguides, bends, tapers, power splitters, mode converters, and edge couplers—offers a comprehensive toolkit for designing complex PICs with outstanding performance, poised to meet the demands of next-generation optical communication systems.

Reference

[1] H.-Y. Lu et al., "Low-loss High-uniformity Silicon Nitride Optical Building Blocks Integrated on Silicon Photonics Platform," in OFC 2025, Optica Publishing Group, 2025, Paper Th1G.2.