Introduction
As data demands continue to increase exponentially, conventional electrical interconnects face fundamental limits in power consumption, bandwidth density, and crosstalk. Optical interconnects offer a promising solution to this "data bottleneck" limiting computer architecture. While silicon photonics links and VCSEL-based parallel optics have demonstrated low power results down to the pJ/bit regime, a new approach using microLED arrays takes parallel optics to an unprecedented level of integration and efficiency.
The LightBundle Architecture
The basic architecture for these highly parallel optical links is shown in Figure 1a. Arrays of hundreds of GaN-based microLEDs (μLEDs), originally developed for display applications, are integrated directly onto a CMOS IC to form a transmitter array. Each μLED is driven in parallel by a dedicated driver circuit on the IC.
On the receive side, an array of detectors is integrated, coupled to the transmitter array through a fiber ribbon cable or optical waveguide array. This massively parallel approach avoids the need for power-hungry serializer/deserializer (SerDes) circuits by operating each parallel lane at relatively low speed, matching the fundamentally parallel nature of processor and memory buses.
The 1 Tbps Transceiver ASIC
Implementing this architecture, researchers at Avicena have developed a 1 Tbps optical transceiver IC fabricated in a 16nm CMOS process (Figure 1b). The 2.7mm x 4.2mm chip contains 304 transmit cells, each integrating a μLED driver with pre-emphasis, with a 304-element μLED array directly integrated on the IC.
On the receive side, the chip has 304 receive cells with transimpedance amplifiers, limiting amplifiers, and retiming circuits with digital offset cancellation. An external silicon photodetector array is flip-chip bonded directly onto the receive array.
Optical Components
The μLEDs used are 8μm diameter apertures formed from GaN multiple quantum well (MQW) epilayers grown on sapphire substrates. A "lateral" device structure allows both n and p contacts on the same side for simple integration. 331-element μLED arrays are transferred onto the CMOS IC using a laser liftoff process developed for display manufacturing (Figure 2a).
A microlens array is then integrated on the μLED array to efficiently couple light into a 331-element fiber ribbon cable with 50μm cores assembled into a hexagonal ferrule (Figure 2b). The alignment tolerance between the arrays and fibers is a relatively relaxed ±7μm.
On the receive side, the photodetector array consists of back-illuminated lateral interdigitated p-i-n silicon detectors with 35μm active areas (Figure 2c). The array is bonded to the CMOS IC and a microlens array stamped on the backside optimizes coupling from the fiber bundle.
Performance Results
In initial testing, each μLED channel could be directly modulated up to 4 Gbps (Figure 3a). At the nominal 3.3 Gbps speed per lane, the transmitter dissipates only about 1 pJ/bit of energy.
The integrated receiver circuits consume about 0.35 pJ/bit at 3.3 Gbps. With a reference 430nm transmitter, the open-eye monitor (Figure 3b) shows clean signal reception.
The integrated bit error ratio tester (BERT) reports error-free reception down to -14 dBm received power per channel (Figure 3c).
With all 304 transmit and receive channels operating in parallel at 3.3 Gbps, the aggregate bidirectional bandwidth exceeds 1 Tbps. The areal density of 1.5 Tbps/mm2 makes this the most compact and low power optical transceiver IC ever developed.
The Promise of Parallel Optics
By leveraging recent advances in microLED and CMOS integrated circuit technology, this work demonstrates the potential of highly parallel optical interconnects to break through the bandwidth and power limits of conventional electrical signaling. Operating at only around 1 pJ/bit, orders of magnitude lower power is possible compared to copper electrical links. The wide parallelism provides tremendous bandwidth scalability. And the ultra-compact form factor enables tight integration with processor and memory chips. As microLED and detector integration advances, this LightBundle approach points the way toward energy-efficient chip-to-chip optical interconnects supporting beyond Tbps bandwidths for future computing systems.
Reference
[1] B. Pezeshki, "430nm Optical Transceiver on CMOS Using 304 µLEDs with Aggregate 1 Tbps and Sub-pJ per Bit Capability," in Proceedings of the IEEE International Conference on Photonics, Sunnyvale, CA, USA, 2024, pp. 1-2. doi: 979-8-3503-9404-7/24/$31.00.
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