Photonic Cryptographic Circuits: Implementing Substitution Boxes with Silicon Photonics

Introduction

With the rapid development of photonic computing infrastructures, such as those for photonic disaggregated computing, ensuring the security of computations has become increasingly important. Cryptographic functions play a crucial role in achieving this goal. While previous studies have proposed implementing simple ciphers like the Vernam cipher using photonic elements, there has been limited research on photonic implementations of complex digital functions in block ciphers. This tutorial introduces a groundbreaking implementation of a significant cryptographic function, a 4-bit substitution box (S-box), employed in a lightweight block cipher using silicon photonic circuits.

The S-box Implementation

The focus of this tutorial is the implementation of a 4-bit S-box from the PRESENT cipher, a lightweight cipher standardized in ISO/IEC 29192-2. The S-box is a nonlinear transformation implemented using a predetermined look-up table. The S-box used in PRESENT is a 4-bit to 4-bit S-box in a Galois field of order 2^4.

To implement the S-box, the one-hot encoding method is employed, which converts a 4-bit sequence into 16 ports utilizing wires based on a look-up table. Theoretically, any function in small bits can be constructed using this method. Two types of S-box implementations are proposed, each with different types of inputs.

Implementation 1: MZI-based S-box:

The first implementation takes an electrical signal as input and outputs an optical signal using Mach-Zehnder interferometer (MZI) switches. Figure 1 illustrates this approach.

Fig. 1. Four-bit I/O S-box using MZI.

In this implementation, the light arrives at one of the ports while the MZIs switch the path. The input of the MZI is an electrical signal, and the high extinction ratio of the output allows the correct output to be easily distinguished.

Implementation 2: Y-branch-based S-box:

The second implementation takes an optical signal as input and outputs an optical signal using Y-branches. Figure 2 shows this approach.

Fig. 2. Four-bit I/O S-box using Y-branches.

Here, a decoder used in digital circuits is constructed using a combination of Y-combiners and splitters. The decoder is based on dual-rail logic [3], which involves two wires, (x, ¯x), where ¯x represents the complement of bit x. Two stages of Y-branch combiners work as coherent adders to mimic the all-optical AND operations by assuming the constructive interference condition. This implementation allows for the calculation of the S-box entirely using optical signals, ideally without the need for electrical signals.

Fabrication and Evaluation

To demonstrate the proof-of-concept for these implementations, custom chips were fabricated. Figure 3 shows the fabricated silicon photonic chips observed under a microscope.

Fig. 3. Fabricated silicon photonic chips. (a) Thermo-optic MZI or (b) Y-branches for conversion to photonic ports.

Figure 3(a) shows thermo-optic MZI switches with a nearly 100% yield rate, suitable for principle verification. The switches use two 3-dB directional couplers (DCs) with low insertion loss. In Figure 3(b), the input signal is generated using thermo-optic MZI switches set before the first stage of Y-branch splitters on the circuits to simulate the 4-bit input.

To evaluate the implementations, a printed circuit board and a chip carrier were customized for wire bonding. The heaters for the MZI and the phase shifter of the Y-branch combiners were connected to electrical pads, and a custom fiber array was connected to the input from the light source and the output of the S-box.

Figures 4(a) and 4(b) show example results when the S-box input is 0x8 and 0x1, respectively.

Fig. 4. Results of S-box calculations. Output power measured using power meter represented on vertical axis and port number represented on horizontal axis.

In Figure 4(a), the laser has a wavelength of 1532 nm and a power of 1.52 mW. The results show that port 3 has the highest output power of 170 μW, indicating that the S-box output is 0x3. The light propagation delay in the chip is estimated at approximately 47 ps with low latency, and the insertion loss is estimated at approximately 8 dB.

In Figure 4(b), the laser has a wavelength of 1530.02 nm and a power of 1.0 mW. Port 5 receives the highest output power, indicating that the S-box output is 0x5. The light propagation delay in the chip is estimated at approximately 201 ps with low latency. The insertion loss is estimated at approximately 27 dB, caused by the circuit construction of the Y-branch splitters and combiners, which are dominant. The extinction ratio is relatively low because the Y-branch combiner is not necessarily an ideal AND operation. Implementing a Ψ gate instead of the Y-branch combiner may result in a higher extinction ratio, which is a topic for future study.

Conclusion

This article has demonstrated the implementation of an S-box circuit in a block cipher using silicon photonic circuits. The one-hot encoding method employed can achieve low-latency calculations. The evaluations showed the ability to calculate the correct S-box output for both the MZI-based and Y-branch-based implementations. Future work aims to fabricate the entire chip for cryptography, further advancing the field of photonic cryptographic circuits.

Reference

[1] J. Takahashi et al., "Photonic Cryptographic Circuits Consisting of Thermo-optic MZI Switch or Y-Branches," NTT Social Informatics Laboratories, Tokyo, Japan; NTT Basic Research Laboratories, Kanagawa, Japan; Bunkyo University, Kanagawa, Japan; Gunma University, Gunma, Japan; University of Nagasaki, Nagasaki, Japan, 2024, pp. 1-6, doi: 979-8-3503-9404-7/24/$31.00 ©2024 IEEE.